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Release Notes | Memtest86 4.0

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In this page we post the official release notes and changelogs related to Memtest86 4.0, if and as software developers make available these. However, if you need more info on Memtest86 4.0, or relases notes are not available yet, you can always consider to read its description as well.

Memtest86 4.0
  • Support for testing with multiple CPUs. All tests except for #11 (Bit Fade) have been multi-threaded. A maximum of 16 CPUs will be used for testing.
  • CPU detection has been completely re-written to use the brand ID string rather than the cumbersome, difficult to maintain and often out of date CPUID family information. All new processors will now be correctly identified without requiring code support.
  • All code related to controller identification, PCI and DMI has been removed. This may be a controversial decision and was not made lightly. The following are justifications for the decision:
    1. Controller identification has nothing to do with actual testing of memory, the core purpose of Memtest86.
    2. This code needed to be updated with every new chipset. With the ever growing number of chipsets it is not possible to keep up with the changes. The result is that new chipsets were more often than not reported in-correctly. In the authors opinion incorrect information is worse than no information.
    3. Probing for chipset information carries the risk of making the program crash.
    4. The amount of code involved with controller identification was quite large, making support more difficult.

    Removing this code also had the unfortunate effect of removing reporting of correctable ECC errors. The code to support ECC was hopelessly intertwined the controller identification code. A fresh, streamlined implementation of ECC reporting is planned for a future release.
  • A number of conditions existed that potentially cause problems when testing more than 4 GB of memory. Most if not all of these conditions have been identified and corrected.
  • A number of cases were corrected where not all of memory was being tested. For most tests the last word of each test block was not tested. In addition an error in the paging code was fixed that omitted from testing the last 256 bytes of each block above 2 GB.
  • The information display has been simplified and a number of details that were not relevant to testing were removed.
  • Memory speed measurement has been parallelized for more accurate reporting for multi channel memory controllers.
  • This is a major re-write of the Memtest86 with a large number of minor bug-fixes and substantial cleanup and re-organization of the code.
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